In semiconductor devices of recent years, high capacity of memory device has been strongly demanded as well as reduction in chip size. However, the increase of the capacity of memory devices, such as a larger number of memory banks tends to result in a larger memory chip size because a plurality of access signal lines is aligned with intervals in a chip layout in order to avoid undesired noise effects from adjacent signal lines. Consequently, the increased number of signal lines with more intervals results in a larger space in the chip layout of multi-bank structure in a memory device serving as a main memory (e.g., dynamic random access memory (DRAM)).
Some techniques to access a plurality of banks have been disclosed. For example, U.S. Pat. No. 9,418,711 teaches a memory device including a plurality of memory mats classified into groups selected by bits of a row address, a main word driver for selecting a main word line based on bits of the row address, an FX driver for selecting a word driver selecting line (FX) based on bits regardless of the bits of the row address, and a plurality of sub-word drivers selected by the main word line and the word driver selecting line to drive the corresponding sub-word line. FIG. 1 is a circuit diagram of a sub-word driver circuit in a memory device. For example, the sub-word driver circuit in FIG. 1 includes four sub-word drivers. Each sub-word driver activates a sub-word line (AASWLT) responsive to three signal lines including a main word line (ARMWLB) and a pair of word driver selecting lines (ARFXT/ARFXB). FIG. 2 is a schematic diagram of main word lines (ARMWLB), word driver selecting lines (ARFXT/ARFXB), and sub-word lines (AASWLT) in a memory mat (MAT) in the memory device. In FIG. 2, eight sub-word lines (AASWLT) are coupled to one main word line (ARMWLB). Of these eight sub-word lines (AASWLT), any one sub-word line (AASWLT) is activated with eight pairs of word driver selecting lines (ARFXT/ARFXB). A pair of word driver selecting lines (ARFXT/ARFXB) in the sub-word driver SWD is common for two memory mats (MAT). Therefore, an increase in a number of FX drivers causes an increase of an area of the X decoder. If a number of circuit components in each FX driver increase, the size of the area of the X decoder also increases.